FIELD OF THE INVENTION
The present invention relates to a bi-directional scan circuit, and more particularly is suitable to apply for a horizontal bi-directional scan circuit of a dual direction deflection circuit.
Heretofore such type of a deflection circuit, (hereinafter, referred to as "a deflection circuit of a bi-directional scan circuit") has been proposed in U.S. Pat. No. 4,672,449, in which a horizontal deflection coil is driven by using drive signals such as sine-wave signals, the signal level of which changes symmetrically before and after the predetermined point of time.
With the deflection circuit, a display image can be formed by means of either a scan running from left to right in a display (hereinafter, referred to as "going scan") or a scan running inversely from right to left in the display (hereinafter, referred to as "returning scan"), so that the deflecting frequency can be reduced to 1/2.
In this deflection circuit, there can be prevented a sudden change of the deflecting current which generates saw-tooth signals, so as to reduce unnecessary radiation etc. and leads of elements of the deflection circuit.
Especially if the deflection circuit is composed of a resonance circuit and the deflection coil is driven by a sine-wave current as shown in FIGS. 1A and 1B, the electric power for required deflecting can be reduced by a simple constitution as discussed in U.S. Pat. No. 5,051,668.
However, when the deflection coil is driven by a pure sine-wave current, linearity of the deflecting current I.sub.L deteriorates during the peak period thereof shown by slant lines in FIGS. 1A and 1B. Above all, this drives the deflection coil to overscan, therefore there is a problem of supplying wasteful deflecting current I.sub.L during the period of the slant lines.
In practice, when a conventional 34-inch cathode-ray tube is used, the period of the slant lines corresponds to approximately 38 [%] of the whole period, and the deflecting current I.sub.L corresponding to approximately 17 [%] in amplitude is supplied wastefully.
As one method for solving this problem, the time base of the video signal is controlled so that there is a method for improving the linearity without supplying wasteful deflecting current I.sub.L.
However, this method complicates the constitution of the video signal processing circuit and the beam current needs to be changed in accordance with the control of time base for keeping the brightness of the whole display constant. Thus, this makes the whole constitution complicated.
Besides, there is a problem of the change of beam shape etc., by the change of the beam current.
On the other hand, as shown in FIGS. 2A and 2B, there is a method in which the deflecting current I.sub.L is applied in order to delete the wasteful portion.
In this method, where the deflection coil is driven in accordance with the operating principle shown in FIG. 3, the deflection coil L can be driven by such deflecting current I.sub.L.
In the deflection circuit 1 of FIG. 3, a capacitor C1 is connected to the deflection coil L via a selecting circuit 2, so that the resonance circuit is composed of the capacitor C1 and the deflection coil L.
If left alone in this state, in the deflection coil L, the deflecting current of a sine-wave shape flows. If this resonance circuit has no loss, the deflecting current continuously flows with no attenuation.
With respect to the deflecting current I.sub.L changing in the above manner, when the terminal voltage of the deflection coil L falls to the predetermined voltage V.sub.M at the point of time t1, the contact of the selecting circuit 2 of the deflection circuit 1 is switched to the capacitor C2 side.
Here, if the capacitance of capacitors C1 and C2 is equal, and the capacitor C2 is charged to a voltage -V.sub.M, the deflecting voltage V.sub.L drastically falls to the voltage -V.sub.M from the voltage V.sub.M at the point of time t1, and changes in a sine-wave shape from this voltage -V.sub.M thereafter.
With respect to the deflecting voltage V.sub.L changing in a sine-wave shape, when the deflecting voltage V.sub.L continuously rises to the voltage -V.sub.M at the point of time t2, the contact of the selecting circuit 2 of the deflection circuit 1 is switched.
Thus, the deflection coil L is connected to the capacitor C1 which is separated from the capacitor C2 and is kept to the voltage V.sub.M. The deflecting voltage V.sub.L rises to V.sub.M from the voltage -V.sub.M, and changes in a sine-wave shape thereafter.
By this operation, two capacitors C1 and C2 are alternately switched at the predetermined timing and are connected to the deflecting coil L, and the voltage V.sub.M and -V.sub.M on switching are set to a predetermined value, so that the linearity can be improved without supplying wasteful deflecting current.
As a matter of fact, this type of deflecting current I.sub.L can be formed by the deflection circuit 4 as shown by an equivalent circuit in FIG. 4.
That is, the deflection circuit 4 is composed of the resonance circuit with the capacitor C and the deflecting coil L connected to each other via the selecting circuit 6.
In the deflection circuit 4, the contact of this switching circuit 6 is switched to insert the direct-current power source 8 of a voltage 2V.sub.M into the resonance circuit during the period that the deflecting voltage V.sub.L rises above the voltage -V.sub.M the period being from the point of time t2 to t1 in FIGS. 2A and 2B.
Thus, during the period from the point of time t2 to t1, the direct-current level of the deflecting voltage V.sub.L is shifted by the voltage 2V.sub.M and the deflecting coil L can be driven with the deflecting voltage V.sub.L shown in FIGS. 2A and 2B.
Concretely, as shown in FIG. 5, the selecting circuit 6 (FIG. 4) is provided with a semiconductor switch corresponding to resonance part 10 having the capacitor C and the deflecting coil L, so that an energy supplying part 12 is connected to supplement for the loss of the resonance part 10.
That is, the deflection circuit 14 connects the series circuit of the field-effect transistors Q3 and Q4 in parallel with the DC power source VB. The voltage V.sub.a, the driving power, is supplied from a connection node between the field-effect transistors Q3 and Q4 via the capacitor C3 and the coil L1.
In the deflection circuit 14, as shown in FIGS. 6A to 6M, the field-effect transistors Q3 and Q4 alternately are switched in on or off state. By this operation, the voltage V.sub.a of the connection node between the field-effect transistors Q3 and Q4 rises (FIG. 6C) at the cycle synchronizing with the deflecting voltage V.sub.L and the deflecting current I.sub.L (FIGS. 6A and 6B) of the deflecting coil L and then the driving power is supplied.
Further, in the deflection circuit 14, the series circuit of the field-effect transistors Q1 and Q2 is connected in parallel with the AC power source 8, and then the diodes D1 and D2 are connected in parallel with these field-effect transistors Q1 and Q2 respectively.
Furthermore, the capacitor C of the resonance part 10 is connected to the node between these field-effect transistors Q1 and Q2 of the selecting circuit 6 which is composed of the field-effect transistors Q1 and Q2, and the diodes D1 and D2.
In this construction, the deflection circuit 14 keeps the field-effect transistor Q2 connected to the ground in the on state so that the series resonance circuit of the deflecting coil L and the capacitor C is formed and the resonance current flows to the deflecting coil L. On the contrary, the field-effect transistor Q2 connected to the DC power source 8 is kept in the on state so that the power of the DC power source 8 can be supplied to the series resonance circuit of the deflecting coil L and the capacitor C.
By switching the connection of the selecting circuit 6 at the point of time t1 and t2, in the deflection circuit 14, the deflecting coil L can be driven with the condition as described above with FIG. 4.
In the deflection circuit 14, the timing at which the field-effect transistors Q1 and Q2 are switched to the off state is controlled to switch the connection of the entire selecting circuit 6.
That is, when the deflecting voltage V.sub.L arises to the voltage -V.sub.M at the point of time t2, the field-effect transistor Q2 is switched to the off state (FIG. 6G).
Hence, in the deflection circuit 14, the voltage Vb of the node between the field-effect transistors Q1 and Q2 (FIG. 6H) rapidly rises with the deflecting current I.sub.L, and the diode D1 changes immediately to the on state (FIG. 6D), and then the connection of the switching circuit 6 can be changed to the DC power source 8 side from the ground side.
When the field-effect transistor Q1 is switched on thereafter, the deflecting voltage V.sub.L rises to the voltage V.sub.M at the point of time t1, so that the field-effect transistor Q1 is switched to the off state (FIG. 6E).
Thus, the voltage Vb of the node of the field-effect transistors Q1 and Q2 rapidly rises with the deflecting current I.sub.L, and the diode D2 is immediately switched on (FIG. 6F) to switch the connection of the switching circuit 6 from the power source 8 side to the ground side.
Thus it can be recognized that the power supplied from the DC power source 8 to the deflection circuit 14 is only a little.
When the diode D1 switches on, the current flows out of the DC power source 8 therethrough. On the contrary, when the field-effect transistor Q1 switches on and the voltage Vb of the connection node starts to drop, the current flows in the direct-current power source 8 through this field-effect transistor Q1.
If the value of this current is different in charging and in discharging the deflecting current I.sub.L on the going scan and on the returning scan becomes different; so that the display picture becomes unsightly.
For this reason, as shown in FIG. 7 with the accompanying circuit, even if the DC power source 8 is replaced with a capacitor CS, the deflecting coil L will be driven by the deflecting current I.sub.L as described in FIG. 2.
Here, in the deflection circuit 20, the deflecting voltage V.sub.L is detected in the voltage detecting circuit 22, and based on the detected result, the field-effect transistors Q3 and Q4 are driven by means of the driving circuit 24.
Further, the detected result of the voltage detecting circuit 22 is outputted to an AFC circuit 26, and then the field-effect transistors Q1 and Q2 are driven by the driving circuit 28 on the basis of the result of the comparison of the horizontal synchronizing signal SYNC with the voltage detecting result, so that the whole operation of the deflection circuit 20 is synchronized with the horizontal synchronizing signal SYNC.
Furthermore, a pin-distortion correcting circuit 29 is connected to the capacitor CS to change the terminal voltage of the capacitor CS in synchronizing with the vertical synchronizing signal in a parabolic shape. Thus, the pin-distortion is corrected.
In this way, in accordance with the constitution shown in FIG. 7, the linearity of the image can be improved without supplying wasteful deflecting current; moreover, with the replacement of the DC power source 8 with the capacitor CS, the general construction can be simplified.
In this construction, however, there is the problem that the deflecting current I.sub.L slightly changes between the going scan and the returning scan, therefore the picture quality of the display is deteriorated corresponding to the changes of deflecting current.
That is, as shown in FIG. 8, the deflection circuit 20 can be represented, as an equivalent circuit, by replacing the field-effect transistor Q1 and the diode D1 with the switching circuit 30 and by replacing the field-effect transistor Q2 and the diode D2 with the switching circuit 32.
As shown in this equivalent circuit, in the deflection circuit 20, when the switching circuit 30 is switched on, the capacitor CS forms a part of the resonance circuit. On the contrary, when the switching circuit 32 is switched on, the capacitor CS is disconnected from the resonance circuit.
Hence, in the deflection circuit 20, the resonance frequencies in the going scan and in the returning scan differ from each other to present various changes in deflecting current between in the going scan and in the returning scan.
In this case, as shown in FIG. 11, the displayed positions of picture portions in the going scan and the returning scan differ from each other, and this results in a problem that the display becomes unseemly.
As a method to solve this problem, it is possible to increase the capacitance of this capacitor CS, however, if the capacitance of this capacitor CS is increased, the correction of the pin-distortion becomes difficult and this is not practical.